The product roadmap has been designed to match the progression of technology innovations with
the markets best suited for their application(s).
Stand-alone discrete memory chips (SPMEM™) offered by Avalanche and licensed branded
partners. Avalanche’s first major products will be drop in SPI compatible NOR devices
targeting mobile, storage, consumer, communications as well as military and industrial
applications. Avalanche will also offer DRAM type interfaces for storage class memories.
Avalanche’s AvRAM™ embedded MRAM technology enables up to a 6X reduction in die size per
megabyte as compared to even the most advanced embedded SRAM used in microprocessors and
chipsets today. Die area of SOC and ASICS are often comprised of significant embedded
SRAM. With the adoption of AvRAM™, fab partner licensees and system OEM’s can save between
35%-50% of overall die size. AvRAM™ is scalable well below 20nm and is able to be
integrated with standard CMOS processes and low voltage transistors. Additionally, the
technology is non-volatile and has no current leakage enabling very low standby power
consumption with unlimited endurance. These attributes enable unique performance and
functionality such as instant on, no memory loss, cyber security, longer battery life and
no wear out and through an internal unified memory interface, dramatically simplifies
system designs/architectures. AvRAM™ provides straightforward integration and
manufacturing with existing logic processes. The memory integration occurs at the back end of
the line (BEOL) after the completion of all logic processes.
Solid-State Cache (SSCache™)
The cost of energy consumed by storage sub-systems in U.S. data centers is expected to exceed
$1B in 2012. Avalanche enabled SSD can directly reduce storage sub-system power consumption
from 13% of overall server energy consumption to less than 1% while delivering the IOPS
performance of DRAM based SSDs without the need for power backup batteries or any redundant
power source such as supercaps. Avalanche enabled SSDs will eliminate the performance
bottleneck caused by traditional hard disc drives (HDDs) in computing applications and allow
CPUs to run with higher utilization yet at a tiny fraction of the power of HDDs and even NAND
based SSDs. High IOPS performance allow for significant number of drive reductions as compared
to NAND based SSDs as well as SPMEM™’s unlimited endurance also reduces the redundancy
related drive count. The result is remarkably lower power costs, lower asset costs, lower
facilities costs and lower overall cost of ownership.