Papers and Conferences
2022
- “Avalanche Boot+ Solutions for Xilinx Versal: Using Our Single 8Gb MRAM to Boot Versal + RTOS + Working Memory”, XRTC meeting held at The Aerospace Corporation in El Segundo, CA, USA, September 20-22, 2022.
- “Accurate and Fast STT-MRAM Endurance Evaluation Using a Novel Metric for Asymmetric Bipolar Stress and Deep Learning”, VLSI Conference, Honolulu, HI, USA, June 12-23, 2022.
2021
- “The Evolution of Hi-Rel MRAM”, RHET Conference, Salt Lake City, UT, USA, November 1-4, 2021.
- “22nm Embedded STT-MRAM Macro with 10ns Switching and >1014 Endurance for Last Level Cache Applications”, VLSI Conference, Kyoto, Japan, June 13-19, 2021.
2020
- “STT-MRAM for Artificial Intelligence Applications”, SEMICON, Taipei, Taiwan, Sep 23-25, 2020
- “STT-MRAM for Embedded Memory Applications”, International Memory Workshop (IMW), Dresden, Germany, May 17-20, 2020
2019
- “Persistent Memory Productization driven by AI & ML”, Persistent Memory Summit, Santa Clara, CA, USA, Jan 24, 2019
- “Experimental Observation of Single Skymion Signatures in a Magnetic Tunnel Junction”, Physical Review Letters 112, 257201, 2019
- “MRAM Developer Day 2019 MRAM Update (Generic MRAM Interface)”, Flash Memory Summit. Santa Clara, CA, USA, Aug 5-8, 2019
- “MRAM Developer Day 2019 MRAM Update (Chiplets and MRAM)”, Flash Memory Summit. Santa Clara, CA, USA, Aug 5-8, 2019
2018
- “High performance perpendicular magnetic tunnel junction with Co/Ir interfacial anisotropy for embedded and standalone STT-MRAM applications”, Applied Physics Letters 112, 092402, 2018
- “STT-MRAM: Past History, Current Status and Future Perspectives”, (Invited) 2018 IEEE International Reliability Physics Symposium (IRPS), San Francisco, USA, March 11–15, 2018
- “Advanced CoFeB/MgO-based pMTJ design using strong Co/Ir interfacial anisotropy for high density standalone and embedded STT-MRAM applications”, (Invited) 2018 IEEE International Magnetic Conference (INTERMAG 2018), Singapore, April 23-27, 2018
- “High density 3D Cross-point STT-MRAM”, (Invited) 2018 IEEE International Memory Workshop, Westin Miyako, Kyoto, Japan, May 13–16, 2018
- “3D Cross-point STT-MRAM”, (Invited) ImPACT SAHASHI Program 2018, Tokyo International Forum, Tokyo, Japan, June 29, 2018
- “STT-MRAM: From STANDALONE TO Embedded Products”, (Invited) 2018 Annual Meeting of Taiwan Association for Magnetic Technology, National Quemoy University, Taiwan R.O.C., July 9, 2018
2017
- “STT-MRAM TO MASS PRODUCTION”, (Invited) The 3rd ImPACT International Symposium on Spintronic Memory, Circuit and Storage, Qatar Science Computer Hall, Aobayama Campus, Tohoku University, September 23-25, 2017
- “Volatile Switch Selector Development for 3D STT-MRAM”, (Invited) The 7th Imec-Stanford International Workshop on Resistive Memories, Leuven, Belgium, September 7–8, 2017
- “STT-MRAM: On The Cusp of Mass Production”, (Keynote Talk) 2017 ShanghaiTech Workshop on Emerging Devices, Circuits and Systems (SWEDCS’2017), ShanghaiTech University, July 7-8, Shanghai, China
- “STT-MRAM Technology Overview”, (Invited) MISM 2017 Moscow International Symposium on Magnetism, Moscow State University, Russia, July 1-5, 2017
- “Perpendicular magnetic tunneling junction switching dynamic modes, extreme events, and performance scaling”, Applied Physics Letters 110, 212404 (2017)
- “3D Cross-Point Spin Transfer Torque Magnetic Random Access Memory”, (invited) SPIN Vol. 7, No. 4 (2017) 1740011
- “Threshold Switching Selector and 1S1R Integration Development for 3D Cross-point STT-MRAM”, 2017 IEEE International Electron Devices Meeting (IEDM), San Francisco, California (USA), December 2nd – 6th, 2017
2016
- “STT-MRAM Technology and Productization”, (invited), NCCAVS Advanced Memory Meeting, Santa Clara, California, April 21, 2016
- “Fully Functional 64Mb STT-MRAM Utilizing Advanced pMTJ on 300mm Wafers,”(invited), International Conference of the Asian Union of Magnetic Societies. Tainan, Taiwan, August 1-5, 2016
- “Extreme Events in STT-MRAM Speed Retention and Reliability” (invited), SPIE Nanoscience + Engineer Symposium, San Diego, California, August 28-September 1, 2016
- “Avalanche Technology, Leader in pMTJ Solutions”, Flash Memory Summit, Santa Clara California, August 9-11, 2016
- “STT-MRAM Technology, Mass Production and Beyond”, (Invited) 2nd ImPACT International Symposium on. Spintronic Memory, Circuit and Storage, Tsukuba International Congress Center, Japan, September 30, 2016
2015
- “Fully Functional 64Mb pMTJ STT-MRAM Chips on 300mm Wafers”, (invited), 2015 International Workshop: Spintronics VLSI, Sendai, Japan, Nov 20-21, 2015
- “Fully Functional pMTJ STT-MRAM Chips with Portable Manufacturing and Robust Performance,”(invited), 3rd US Government Workshop on Magnetic Tunnel Junctions, College Park, Maryland, Nov 4, 2015
- “pMTJ Driven STT-MRAM Sampling From 300 mm Process,” Flash Memory Summit, Santa Clara, CA, August 9-11, 2015
- “pMTJ Driven STT MRAM with 300mm Process,” (invited) 2015 Intermag Conference, Beijing, China, May 11-15, 2015
- “Spin-Orbitronics Memory Device with Matching and Self-reference Functionality,” (IEEE. Trans. on Magnetics, vol. 51, no.11, 1401504, 2015), 2015 Intermag Conference, Beijing, China, May 11-15, 2015
- “Unipolar Switching of Perpendicular MTJ for STT-MRAM Application,” 2015 Intermag Conference, Beijing, China, May 11-15, 2015
- “STT–MRAM: A Leading Emerging Nonvolatile Memory,” (invited) Huawei 2015 Annual Strategic Technology Meeting, Shenzhen, China, May 19-20, 2015
2014
- “pMTJ-Driven STT-MRAM Products with 300mm Process” — Canon Winter MRAM Forum, IEEE International Electron Devices Meeting, San Francisco, CA Dec. 16, 2014
- “Perpendicular magnetic tunnel junction with thin CoFeB/Ta/Co/Pd/Co reference layer,” Applied Physics Letters 105 (19), 192403(1)-192403(5), 2014
- “pMTJ-Driven STT-MRAM and Its Thermal Stability Scaling,” 2014 MMM Conference, Honolulu, Nov 3-7, 2014
- “Perpendicular magnetic tunnel junction with ultra-thin reference layer,” 2014 MMM Conference, Honolulu, Nov. 3-7, 2014
- “Novel Read Method of STT-MRAM Multi-Level-Cell,” 2014 MMM Conference, Honolulu, Nov. 3-7, 2014
- “Impact of Ion Beam Etch (IBE) on TMR and Switching Current of pMTJ STT-MRAM Cells on 300mm Wafers,” 2014 MMM Conference, Honolulu, Nov. 3-7, 2014
- “MRAM Panel” — Flash Memory Summit, Santa Clara, CA, August 6, 2014
- “Life Beyond Flash: New Non-Volatile Memory Technologies” — Flash Memory Summit, Santa Clara, August 7, 2014
- “Different Dielectric Breakdown Mechanisms Between RF-MgO and Natural Oxidized MgO”: Appl. Phys. Express 7, 083002-1 to 083002-4, 2014
- “pMTJ Driven STT-MRAM”: From Low Power Cache and SoC Memories to New Market Applications, Canon-Anelva MRAM Forum, San Francisco, July 9, 2014
2013
- “Multi-level Perpendicular MTJ STT-MRAM With Controlled Edge Field”, 2013 MMM Conference, Denver, Nov 4-8, 2013
- “Dramatic Reduction of Read Error through Pulse Width Control in Spin Torque Random Access Memory”, 2013 MMM Conference, Denver, Nov 4-8, 2013
- “MRAM: The Next Storage Memory”, Flash Memory Summit 2013, Aug. 12-15, 2013, Santa Clara Convention Center, Santa Clara, CA
- “STT MRAM Technology: Status and Outlook”, The 3rd International Symposium on Advanced Magnetics Materials and Applications (ISAMMA), July 21-25, 2013, Taichung, Taiwan
- “STT MRAM: Perpendicular MTJ Prospective”, Panel discussion, 2013 5th IEEE International Memory Workshop (IMW), 26-29 May 2013, Monterey, CA
- “Write Error Rate Investigation of Spin Transfer Switched Magnetic Tunnel Junction”, The 3rd CSIS International Symposium on Spintronics-based VLSIs and The 11th RIEC International Workshop on Spintronics, Tohoku University, Jan.31-Feb.1, 2013 Sendai, Japan
- “Investigation of Write Error Rate in Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM)”, 12th Joint MMM/Intermag Conference , Jan 14-18, 2013
- “Dramatic Reduction of Read Disturb Through Pulse Width Control in Spin Torque Random Access Memory”, Applied Physics Letters 103 (14), 142419, 2013
- “Bit error rate investigation of spin-transfer-switched magnetic tunnel junctions”, Applied Physics Letters 101 (14), 142406-142406-4, 2013
2012
- “STT -MRAM: Latest Advances and MTJ Roadmap”, Canon-Anelva MRAM Forum, 12 December, 2012, San Francisco
- “STT -MRAM Recent Progress and Roadmap”, 2012 International Workshop on Information Storage/9th International Symposium on Optical Storage, 21-24 October, 2012, Shanghai, China
- “Write Error Rate in Spin Transfer Torque Magnetic Random Access Memory”, SPIN Journal, Vol. 02 No. 3 pp12400, 2012
- “STT MRAM Recent Progress and Roadmap”, 9th International Symposium on Advanced Gate Stack Technology, October 3-4, 2012, Saratoga, NY
- “STT MRAM: Recent Strong Semiconductor Industry Traction”, The 2nd CSIS International Symposium on Spintronics-based VLSIs and The 8th RIEC International Workshop on Spintronics, Tohoku University 2-3 Feb. 2012 Sendai, Japan
- “STT MRAM: Recent Strong Semiconductor Industry Traction”, IEEE 8th Annual Full Day Symposium – “Emerging Non-Volatile Memory Technologies”, 6 April 2012, Texas Instruments Conference Center, 2900 Semiconductor Drive, Santa Clara, CA
2011
- “Progress and Outlook for STT MRAM”, 2011 Frontier of Spintronics /Nanoelectronics Workshop, April 24, 2011, Hsinchu Ambassador Hotel, Hsinchu, Taiwan
- “Progress and Outlook for STT MRAM”, Silicon Valley Magnetic Symposium Program, June 18, 2011, Cadence Design Systems Auditorium, 2655 Seely Avenue, San Jose, California
- “Spin Programmable Storage Solutions”, Flash Memory Summit 2011, Aug 11, 2011, Santa Clara Convention Center, Santa Clara, CA
- “Recent Progress and Roadmap for STT MRAM”, The International Conference on Computer-Aided Design (ICCAD), Nov. 7-10, 2011, San Jose, California, USA
- “Recent Progress and Roadmap for STT MRAM”, New Non-Volatile Memory Workshop, Nov. 10-11, 2011, ITRI, Hsinchu, Taiwan
- “STT MRAM: Recent Industry Traction”, The 7th Taiwan International Conference on Spintronics (TICSpin), Dec. 2-5, 2011, “The Solas” spring resort, Taiwan
2010
- “STT MRAM: Recent Progress and Market Positions”, International Symposium on Integrated Functionalities (ISIF), June 13-16, 2010, San Juan, Puerto Rico
- “Recent Advances and Market Positions of Spin Torque MRAM”, The 21st Magnetic Recording Conference (TMRC 2010), Aug 16-18, 2010, University of San Diego, La Jolla, California, USA
- “Recent Advances and Market Position of Spin-Torque MRAM”, Asia-Pacific Data Storage Conference (APDSC’10), Oct. 27-29, 2010, Parkview Hotel, Hualien,Taiwan
- “Latest Advances and Market Positions of Spin Torque MRAM”, The 6th Taiwan International Conference on Spintronics (TICSpin), Dec.1-3, 2010, Taichung, Taiwan
2009
- “Integrating Magnetic Tunnel Junctions on CMOS: the Challenges of STT- MRAM”, June 9th, 2009 , UCLA, CA, USA
- “Integrating Magnetic Tunnel Junctions on CMOS: the Challenges and Successes of MRAM”, 2009 International Magnetics Conference (Intermag), May, 4-8, 2009 , Sacramento, CA, USA
- “Spin Transfer Torque Driven Magnetoresistive Random Access Memory (STT-MRAM)”, 2009 American Physics Society (APS) March Meeting, March 16-20, 2009, Pittsburgh, PA, USA
- “Integrating Magnetic Tunnel Junctions on CMOS: the Challenges and Successes of MRAM”, The 5th Taiwan International Conference on Spintronics (TICSpin), Sep. 9-11, 2009, Taichung, Taiwan