The slowest part of any compute platform today is the Input Output subsystem, known as the dreaded bottleneck. The bottleneck appears in many levels. System designers have tackled this by introducing cache’s to their designs. Fastest cache architectures hold the data and do not write it back to slower subsystems. This transient data is vulnerable to system power failures where data in the cache has not been stored. System designers have solved this by using Non-volatile cache architectures. In many systems it is done at the Operating system level using NVDIMMs or by holding disk transactions in a NV transaction log in a RAID disk controller or both.
STT-MRAM with its instant access speed and non volatility solves this problem and open up the opportunity to system designers to improve system performance and speed up transactions in a safe reliable manner without the need for battery or capacitor backup.
At the system level, STT-MRAM is the ideal solution to build the next generation of M2 module for the common computer platform as a Level 3 cache replacing the low performing NAND modules, or a high density PCI RAID controller to improve IO performance achieving millions of Random read/write or very low latency IOPs.
The “Next Generation MRAM” from Avalanche Technology delivers the needed high performance unified memory architecture to remove these system bottlenecks safely and reliably.
