2 New SEE MAPLD Presentations Now Available

Disposable COTS (Commercially-available Off The Shelf) microelectronics may appeal to some satellite projects. Yet 2 issues with COTS were called out at the recent SEE MAPLD conference:
1. It can take hundreds of hours of radiation testing and cycles of learning to tune each device to the rigors of space.
2. Demand is growing for a far more reliable and radiation resilient technology to replace susceptible Flash memory.

What is Avalanche Technology doing to respond? We’re tackling both fronts by A) continuing to provide the RH ecosystem with high reliability and density NVM for use in space, while B) leveraging an optimized hi-rel architecture and survivability insights from hundreds of hours of radiation testing.

Presentation 1:

You can learn details from Avalanche GM Paul Chopelas, who showcased at MAPLD some methods to “Optimize FPGA and SoC Configuration for Speed, Resilience and Adaptability” in Space.

Presentation 2:

Paul also shared a presentation at the SEE Workshop on the “Heavy Ion Test Results on Multi-Gigabit STT-MRAM” presentation (available upon request).

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