Resources
Documents
PEMS I, II, III
Change

1Gbit – 8Gbit QED Dual-Quad SPI P-SRAM Memory

Receive Updates to this Datasheet

Optional: Enter your email address to be notified when this Datasheet is updated.

Revision J.2 - January 13, 2026

Latest Revision Changes

  • Put the TID limit for regular devices back to ≤ 100K RAD TID which was in the previous version. -A has a limit of ≤ 300K RAD TID.
Sign up for our quarterly newsletter.
Avalanche Technology Inc.
3450 West Warren Avenue,
Fremont, CA 94538
(510) 897-3300
info@avalanche-technology.com
©2024 Avalanche Technology | All Rights Reserved | Privacy Policy