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1Gbit – 8Gbit Dual Quad SPI P-SRAM Memory

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Revision J - June 10, 2025

Latest Revision Changes
  • Updated Power Up Ramp for VCC and VCCIO
  • Updated Table showing HBP [2:0 H-H-H]
  • Output drive strength default value changed to C0
  • Added package height impact due to reballing to Lead.
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